The Coreboot project, the renowned free alternative to proprietary BIOS and firmware, has released its new version 25.09, which includes 684 changes developed with the collaboration of 110 programmers, demonstrating the dynamism and vitality of its community.
Among the most notable new features is the addition of support for new motherboards, including models from ASROCK, GIGABYTE, HP, Intel, and Lenovo, significantly expanding the project's compatibility with modern desktops, workstations, and laptops.
Main new features of Coreboot 25.09
Uno of the most outstanding aspects Coreboot 25.09 is the significant improvement in boot performance, thanks to multiple optimizations in the storage flow and payload decompression. The implementation of SSE instructions for LZMA decompression has allowed the SPI controller to preload data into the CPU cache without stopping the decompression operation, achieving a 30% speedup and reducing boot time by 46 milliseconds in tests performed on the Lenovo X220.
Furthermore, the Intel Panther Lake platforms debut asynchronous file loading system which uses SPI DMA to preload the fsps.bin file while the CPU executes other tasks. This parallel processing technique It manages to reduce boot times by between 17 and 18 milliseconds, improving efficiency without compromising stability.
Coreboot also incorporates new synchronization functions, such as cbfs_preload_wait_for_all(), which ensure safe completion of operations before shutting down the storage backends. The Fast SPI DMA subsystem, now based on a token-based transfer queue, offers more predictable and stable performance in complex load environments.
Advanced boot mode detection and power management
Another key improvement is the Implementation of the boot mode information framework, which introduces the LB_TAG_BOOT_MODE tag into Coreboot's internal tables. This system allows payloads to be directly informed of the boot status, whether in normal mode, low battery mode, or charging mode.
This innovation eliminates the need for payloads to reimplement battery detection logic, simplifying power management and ensuring that status data is always available, even in the early stages of firmware. Additionally, the new lb_add_boot_mode() function allows platforms to tailor detection to their specific needs without losing backward compatibility.
In addition to this, it is also highlighted that eThe development team has completely restructured the management of MTRR records. for the graphics memory, moving its configuration to an earlier stage of the silicon initialization process. This modification, applied to the FSP-S (Firmware Support Package – Silicon) module, has reduced the graphics subsystem initialization time from 123 to 115 milliseconds.
The soc_mark_gfx_memory() function sets write-combined (WC) registers early in the boot process, improving memory access patterns during graphics firmware loading. This change, in addition to improving performance, makes code easier to maintain and ensures more consistent execution in different environments.
General improvements and ecosystem expansion
Coreboot 25.09 introduces a number of additional improvements, among which the following stand out: Optimizations in the amdfwtool tool, which now offers expanded support for the Turin platform, and the smmstoretool update, which supports variable block sizes and GUID aliases for better UEFI variable management.
TPM support (Trusted Platform Module) has been expanded with an integration of fTPM for AMD platforms, and improved logo rendering and Bochs display driver support. Measures have also been implemented to improve system stability and security during flash compression and write operations.
At the tools and dependencies level, this release updates several key components: binutils 2.44, ACPICA 20250404, MPFR 4.2.2, SeaBIOS 1.17.0, U-Boot 2025.07, and improvements to LinuxBoot and Libpayload, with better coordination in boot mode management and support for recent architectures.
Finally, it's worth mentioning that the next version, Coreboot 25.12, is scheduled to arrive at the end of December of this year, maintaining the project's consistent pace of development.
Source: https://github.com/coreboot