Facebook has developed an open PCIe card with an atomic clock

A few days ago the news was released that Facebook published the developments related to the creation of a PCIe board, what has l includeda implementation of a miniature atomic clock and a GNSS receiver.

The board was originally designed as a modular device, allowing the use of a variety of commercially available atomic clock chips and GNSS modules, such as SA5X, mRO-50, SA.45s, and u-blox RCB-F9T. Orolia intends to start the production of finished boards to prepared specifications.

The time card is being developed as part of a more global time device project intended to provide components for the creation of primary time servers (Time Master) (Open Time Server) that can be implemented in your infrastructure and used, for example, to organize time synchronization in data centers.

Using a standalone server allows you not to depend on external network services to synchronize the exact time, and the presence of a built-in atomic clock provides a high level of autonomy in the event of failures in receiving data from satellite systems (eg due to weather conditions or attacks).

The new NTP-based time architecture uses Stratum 1, an important component that is directly linked to an authoritative time source, such as a global navigation satellite system (GNSS) or a cesium clock.

The peculiarity of the project is that to build a primary time server, you can use a normal server based on x86 architecture, which includes a typical network card and a time card.

On said server, exact time information is received from satellites via GNSS and the atomic clock acts as a highly stable oscillator, allowing a high level of accuracy to be maintained in the event that no information is received via GNSS. The possible deviation from the exact time in case of inability to receive data via GNSS on the proposed board is estimated to be about 300 nanoseconds per day.

The ocp_pt driver has been prepared for Linux y it is planned to be included in the main Linux 5.15 kernel.

The controller implements PTP POSIX interfaces (/ dev / ptp2), GNSS via serial port / dev / ttyS7, atomic clock via serial port / dev / ttyS8 and two devices i2c / dev / i2c- *, with which the capabilities of the hardware clock (PHC) can be accessed from the user environment.

When starting the NTP (Network Time Protocol) server, it is suggested to use Chrony and NTPd, and when starting the PTP (Precision Time Protocol) server, it is suggested to use ptp4u or ptp4l in combination with the phc2sys stack to provide the copy of time values ​​from an atomic clock to a network card.

Coordination of the operation of the GNSS receiver and the atomic clock it can be done in both hardware and software. The hardware functionality of the pairing module is implemented on the basis of FPGA, and the software version works at the level of direct monitoring of the status of the GNSS receiver and the atomic clock from applications such as ptp4l and chronyd.

The reason for the development of an open board instead of using ready-to-use solutions available in the market, is the patented nature of such products, which does not allow us to ensure that the implementation is correct, the proposed software does not comply with the security requirements. (In most cases, outdated programs are shipped and vulnerability fixes can take months or even years to deliver), as well as limited configuration and monitoring (SNMP) capabilities (its own CLI or web user interface is offered) .

The board can be used to organize the work of separate time synchronization servers. Specifications, schematics, BOM, Gerber, PCB, and CAD files required to fabricate the board are posted on GitHub.

Source: https://engineering.fb.com


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  1.   Pelayo said

    FROM FACEBOOK? No way do I want her ...