Recently News broke that Google has teamed up with manufacturing companies SkyWater Technology and Efabless to launch an initiative that allows open source hardware developers to build the chips they develop freely.
The initiative aims to stimulate the development of open hardware, reduce open project development costs and simplify interaction with manufacturing plants.
Thanks to the initiative anyone can start developing their own chips without fear of high costs for the production of initial prototypes. Google covers all production, packaging, and shipping costs.
Applications for inclusion in the free production program can be sent every two months. The nearest slot will close on June 8, and the tokens that managed to enter will be ready on August 30 and will be sent to authors on October 18.
Of the applications submitted, 40 projects are selected (If there are less than 40 applications submitted, all those that have passed the correction control will be put into production). Based on the production results, the developer will receive 50 chips and 5 boards with installed chips.
TLDRs; The Google Hardware Toolchains team is launching a new developer portal, developer.google.com/silicon , to help the developer community get started with their Open MPW transport program. This will allow anyone to submit open source IC designs to be manufactured at no cost.
Since November 2020, when Skywater Technologies announced its partnership with Google to open up its Process Design Kit for the SKY130 process node, the Hardware Toolchains team here at Google has been on a journey to make open silicon construction accessible. for all developers. Having access to an open source and fabricable PDK changes the status quo in custom silicon design industry and academia:
Designers are now free to start their projects free of NDA and usage restrictions.
Researchers can make their research reproducible by their peers.
Open source EDA tools can be deeply integrated with the manufacturing process
Only applications for projects fully distributed under open licenses are accepted, not encumbered with non-disclosure agreements (NDA) and that do not restrict the scope of their products.
Google provided the opportunity for free production of open chip test batches
The data for production must be transferred in the GDSII format, pass the provided test suite, and be reproduced from the original project files (ie declaring an open project, but it will not work to transfer a proprietary design to production).
Each project has a fixed 2,92mm x 3,52mm user area and 38 I/O pins on a predefined harness to strengthen your design. It also has the necessary testing infrastructure to validate the specifications and behavior of the chip before it is sent for recording.
To simplify open chip development, the following open tools are provided:
- SkyWater PDK (Process Design Kit), a toolkit that describes the 130nm fabrication process (SKY130) used in the SkyWater factory and allows you to prepare the design files required for chip production.
- OpenLane is a set of components for the automatic conversion of ASIC RTL circuits to the GDSII format used in chip factories.
- XLS (Accelerated HW Synthesis) is a set of tools for synthesizing project files with chip hardware padding corresponding to the provided high-level description of the required functionality, designed in the style of software development.
- A set of rules for the Bazel assembly system with support for open tools (Yosys, Verilator, OpenROAD) for working with hardware description languages (Verilog, VHDL, Chisel, nMigen).
- OpenROAD is a framework for automating the open circuit development process.
- Verible is a set of tools for Verilog development, including a parser, style formatting system, and linter.
Finally if you are interested in knowing more about it, you can check the details In the following link.